Investigation of area and speed trade-offs in FPGA implementation of an image correlation algorithm

Kincses, Zoltán, Vörösházi, Zsolt, Nagy, Zoltán, Szolgay, Péter, Laviniu, T., Gacsádi, A.: Investigation of area and speed trade-offs in FPGA implementation of an image correlation algorithm.
In: 13th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA), Turin, Italy Aug. 29 - 31, 2012. IEEE, Los Alamitos, Azonosító: 2086144-Terjedelem: 5 p.. (2012) ISBN 978-1-4673-0289-0, 978-1-4673-0287-6

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Item Type: Book Section
Date: 2012
Page Range: Azonosító: 2086144-Terjedelem: 5 p.
ISBN: 978-1-4673-0289-0, 978-1-4673-0287-6
Publisher: IEEE
Place of Publication: Los Alamitos
Faculty: Faculty of Science and Informatics
Department: Műszaki Informatika Tanszék
Institution: Szegedi Tudományegyetem
Language: English
MTMT id: 2086144
DOI id: https://doi.org/10.1109/CNNA.2012.6331455
Date Deposited: 2014. Jul. 31. 13:18
Last Modified: 2019. Feb. 08. 10:50
URI: http://publicatio.bibl.u-szeged.hu/id/eprint/4385

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